Session 24
未知
ISSCC2021 Session 17
Next-Generation ADCs, High-Performance Power Management, and ...
模拟集成电路设计
Cadence PVS Developers Guide
Inc. Cadence Design Sys tems
How to Calculate Balun Performances using ADS Expressions
Che-Sheng Chen
TheDesigner’sGuid[..]
抗浪涌静电器件防护机理与片上集成实验研究
Legend User
一种具有温度补偿 高电源抑制比的带隙基准源 何捷 (1)
基于CMOS工艺的负压低压差线性稳[..]
ESD Design and Synthesis (1)
模拟集成电路分析与设计（第二版）
工作在亚阈值区CMOS OTA的研究
Designing Control Loops for Linear and Switching Power Supplies: ...
Basso
CMOS带隙电压基准的误差及其改进 陈浩琼
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
Phillip E. Allen-CMOS Analog Circuit Design
4<8=8AB@0B>@
一个全差分运放电路的设计
Administrator
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet