Design of Analog CMOS Integrated Circuits
Razavi
A compact power-efficient 3 V CMOS rail-to-rail input/output ...
IEEE
Session 9
未知
Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design
HJ-MASH 多模多标准CMOS锁相环频率综合器[..] 史鹏鹏
Jish
Verilog数字系统设计教程
Power Management Techniques for Integrated Circuit Design, Ke-Horng ...
CN104977963A-兆易创新[..] (1)
A mixed-mode esd protection circuit simulation-design methodology ...
Circuit Simulation by Farid N. Najm (z-lib.org)
BesserWM35.vp:Cor[..] 7.0
jpaiva
Fundamentals of Differential Equations
R. Kent Nagle & Edward B. Saff & Arthur David Snider
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Microsoft Word - RFKitDoc_v1 3.doc
alanw
2004Beek
一种快速瞬态响应的无片外电容LDO[..]
基准电压源和线性稳压器的设计
lmliu
Session 10: Continuous-Time ADCs and DACs
AMBA总线规范_V2.0
kongsuo