USB 2.0
hevryjiang
基于CMOS工艺的ESD器件及全芯[..]
PLJIE
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) ...
未知
Microsoft PowerPoint - 第十一章 带隙基准 [兼容模式]
基准源和温度检测模块设计-tang[..]
zwtang
Fire and Ice QXC to Quantus Migration Guide
Inc. Cadence Design Sys tems
Electromagnetics for High-speed Analog and Digital Communication ...
Ali M. Niknejad
工程电路分析
CMOS模拟IP线性集成电路
华侨大学模拟IC实验8 无缓冲两级运放设计
USER
集成电路版图设计
余华，师建英编著
Handbook of Power Management Circuits
Session 32: Frequency Synthesizers
RFIC2 Razavi
Session 9: ML Processors From Cloud to Edge
393747_Print.indd
0009172
学校代码： 10246
tcheng
Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...
Intel Corporation
PCI Express PHY v1.0 LogiCORE IP Product Guide
Xilinx, Inc.