阻抗匹配与史密斯（Smith）圆图[..]
未知
ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators
模拟CMOS集成电路设计
Behzad.Razavi（第2版 ）（中文 ）hd R2A修复版本2023-11-08
CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated ...
美 & Thomas H. Lee 著 & 余志平 周润德 等译
ISSCC2021-SC4
Spectre Circuit Simulator and Accelerated Parallel Simula tor ...
Inc. Cadence Design Sys tems
Session 1: Plenary Session — Invited Papers
参考书 芯片接口库IO LIBRARY和ESD电路的研发设计应用 (OCR) 王国立
RISC-V IOMMU Architecture Specification
IOMMU Task Group
半导体工艺和器件仿真工具Silvaco TCAD
唐龙谷
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
数字调制解调技术的MATLAB与F[..] Altera Verilog版 杜勇编著
PrimeSim� XA User Guide
Inc. Synopsys
Session 21
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
【汉化】Static Timing Analysis for Nanometer DesignsA Practical ...
CMOS模拟集成电路设计
（美）艾伦，（美）霍尔伯格著
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...