低压高速LDO电路系统的分析与设计
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ESD设计与综合
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Session 35: Adaptive Digital Techniques for Variation Tolerant ...
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Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.
Middlebrook Part 1
mwidmer
一种10 ppm oC低压CMOS带隙电压基准源设计 朱樟明
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深入Linux内核架构
基于CMOS工艺的ESD器件及全芯[..]
PLJIE
Matching Analysis and the Design of Low Offset Amplifiers
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Calibre® Query Server Manual
Siemens Industry Software
Verilog数字VLSI设计教程
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Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao
Session 18: Biomedical Devices, Circuits, and Systems
ZigBee低中频接收机中复数滤波[..]
Cadence Physical Verifi cation User Guide
Inc. Cadence Design Sys tems
A Micropower Chopper-Stabilized Operational Amplifier Using ...
Rod Burt;Joy Zhang