Design of Sigma-Delta Converters in MATLAB
未知
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
ADC-based Receivers for Wireline Communication
Oscillator phase noise: a tutorial
T.H. Lee;A. Hajimiri
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
CMOS集成电路版图+概念、方法与[..]
04_TechActive.fm
Administrator
MCU芯片的复位电路与多模式时钟系统设计
周小军
集成电路版图设计 [陆学斌 主编] 2012年版
A detailed analysis of power-supply noise attenuation in bandgap ...
IEEE Std 802.11b-1999
Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES
RF and Microwave Power Amplifier Design
Andrei Grebennikov
基准电压源和线性稳压器的设计
lmliu
SystemVerilog验证 测试平台编写指南
A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...
Session 5: Analog Interfaces
PHASE-INTERPOLATOR BASED PLL FREQUENCY SYNTHESIZER
ADS2008射频电路设计与仿真实例
徐兴福 著