RISC-V IOMMU Architecture Specification
IOMMU Task Group
HJ-MASH 多模多标准CMOS锁相环频率综合器[..] 史鹏鹏
Jish
CMOS模拟集成电路3艾伦-英文版
4<8=8AB@0B>@
APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital ...
未知
js.2010.PFD biased with shunt regulator
Internal and external op-amp compensation: a control-centric ...
Artificial Intelligence: A Modern Approach, Global Edition, ...
Stuart Russell / Peter Norvig
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
High-Speed System and Analog InputOutput Design Thanh T. Tran
Accurate and Rapid Measurement of IP2 and IP3
Ken Kundert
LDO模拟集成电路设计
《ModelSim电子系统分析及仿真》
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
Cadence PVS Developers Guide
Inc. Cadence Design Sys tems
恒流LDO型自光LED驱动芯片的设计研究
基于0.13μm SOI CMOS工艺的高性能LDO设计
一种快速瞬态响应LDO的设计与实现
TOM
Constraining Designs for Synthesis and Timing Analysis A Practical ...
Frequency Reconfigurable mm-Wave Power Amplifier With Active ...
Chandrakanth R. Chappidi & Kaushik Sengupta