理工书库 lilin | Category: IEEE Custom Integrated Circuits Conference 2006;2006; ; ;10.1109/CICC.2006.320979

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开关功率变换器——开关电源的原理、仿真和设计（原书第3版） (张懋徐德鸿) (Z-Library)

开关功率变换器——开关电源的原理、[..] (张懋徐德鸿) (Z-Library)

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C程序设计语言_第2版新版_-20070821.doc

C程序设计语言_第2版新版_-20[..]

Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance Method

Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance ...

Harmonic Balance for Nonlinear Vibration Problems

Harmonic Balance for Nonlinear Vibration Problems

半导体物理学（第七版）

半导体物理学（第七版）

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

通信标准对数据转换器的要求V1.0

通信标准对数据转换器的要求V1.0

Advanced Electromagnetic Computation

Advanced Electromagnetic Computation

Dikshitulu K. Kalluri

Frequency Compensation of Op-amp and its types Circuit Digest

Frequency Compensation of Op-amp and its types Circuit Digest

CMOS模拟集成电路设计与仿真实例-基于Cadence ADE 陈成颖

CMOS模拟集成电路设计与仿真实例[..] ADE 陈成颖

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge (XAPP1286)

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...

Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design by Mourad Fakhfakh, Esteban Tlelo-Cuautle, Patrick Siarry (eds.) (z-lib.org)

Computational Intelligence in Analog and Mixed-Signal (AMS) ...

非线性最优化基础 ([日] Masao Fukushima 福岛雅夫) (Z-Library)

非线性最优化基础 ([日] Masao Fukushima 福岛雅夫) (Z-Library)

Handbook of Power Management Circuits-Haruo Kobayashi

Handbook of Power Management Circuits-Haruo Kobayashi

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input Stages

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...

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精通 NumPy 数值分析（初译） (it-ebooks) (Z-Library)

精通 NumPy 数值分析（初译） (it-ebooks) (Z-Library)

Category: IEEE Custom Integrated Circuits Conference 2006;2006; ; ;10.1109/CICC.2006.320979

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS SerDes FPGAs

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...

Rakesh H. Patel & William Bereza