VerilogA系统设计与仿真(可[..]
未知
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
Session 19
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
Harmonic Balance Finite Element Method: Applications in Nonlinear ...
Junwei Lu & Xiaojun Zhao & Sotoshi Yamada
Session 20
TheDesigner’sGuid[..]
带温度补偿的高精度CMOS振荡器的[..] (1)
An Engineer's Guide to Automated Testing of High-Speed Interfaces
Hubert Werkmann Jose Moreira
控制之美(卷1)——控制理论从传递[..]
王天威
Distributed Loss-Compensation Techniques for Energy-Efficient ...
PrimeWave� Design Environment for Reliability Analysis User ...
Inc. Synopsys
Michiel Steyaert CMOS CELLULAR RECEIVER FRONT-ENDS
Fundamentals of Digital Logic with Verilog Design, THIRD EDITION
Stephen Brown & Zvonko Vranesic
Session 17: DC-DC Converters
现代接收机
Paul Schwartz
Creating Qsys Components
Altera Corporation
eetop.cn 线性代数及其应用(英文第四版-Gi[..] Strang
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...
Shih-An Yu & Peter R. Kinget
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...