基准源和温度检测模块设计
zwtang
Cadence高速电路板设计
未知
模拟电路版图的艺术
Front Cover Circuit Analysis I.qxd (Page 1)
Karris, Steven T.
Handbook of Power Management Circuits
TCASⅡ 202212
Session 7
A compact power-efficient 3 V CMOS rail-to-rail input/output ...
IEEE
数值分析 第五版 (李庆扬 王能超 易大义) (z-lib.org)
ISSCC2021-1 3
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linjie
Design of an Active Harmonic Rejection N-Path Filter for Highly ...
Caleb Mosby Munsill
Gray Hurst Analysis and Design of Analog Integra
Session 16
通信标准对数据转换器的要求V1.0
Fire and Ice QXC to Quantus Migration Guide
Inc. Cadence Design Sys tems
微波射频电路设计与仿真100例
Administrator
Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...
Shih-An Yu & Peter R. Kinget
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao