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模拟CMOS集成电路设计第2版14609998

模拟CMOS集成电路设计第2版14609998

$Wideband RF PLL fractional/integer frequency synthesizer with integrated VCOs and LDOs$

Wideband RF PLL fractional/integer frequency synthesizer with ...

STMICROELECTRONICS

CMOS Mixed-Signal Circuit Design, 2nd Ed

CMOS Mixed-Signal Circuit Design, 2nd Ed

Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits Advances in Analog Circu

Next-Generation ADCs, High-Performance Power Management, and ...

数字通信同步技术的MATLAB与FPGA实现 Altera Verilog版 [杜勇编著] 2015年版

数字通信同步技术的MATLAB与F[..] Altera Verilog版 [杜勇编著] 2015年版

无电容型LDO的研究现状与进展

无电容型LDO的研究现状与进展

通信系统中的多采样率信号处理

通信系统中的多采样率信号处理

基准源、噪声、开关电容及Monte Carlo仿真

基准源、噪声、开关电容及Monte Carlo仿真

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain

K. Bult;G.J.G.M. Geelen

electronic devices

electronic devices

Thomas L. Floyd

Harmonic Balance for Nonlinear Vibration Problems

Harmonic Balance for Nonlinear Vibration Problems

基于CMOS工艺的负压低压差线性稳压器设计

基于CMOS工艺的负压低压差线性稳[..]

Universal Serial Bus 3.0 Specification

Universal Serial Bus 3.0 Specification

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...

sido buck converter

sido buck converter

Duyu Liu & Xinzhi Liu & Hao Chen & Shouming Zhong

高性能音频Delta-Sigma数据转换器的设计与优化技术研究

高性能音频Delta-Sigma数[..]

二级运放建立时间与相位裕度的分析与优化

二级运放建立时间与相位裕度的分析与优化

Analog Design Essentials

Analog Design Essentials

Category: Simulation

Relationship between frequency response and settling time of operational amplifiers

Relationship between frequency response and settling time of ...

B.Y.T. Kamath, R.G. Meyer & P.R. Gray