理工书库 lilin | Category: 2010 IEEE International Solid-State Circuits Conference - (ISSCC);2010; ; ;10.1109/ISSCC.2010.5433970

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Calibre® DefectReview User's Manual

Calibre® DefectReview User's Manual

Siemens Industry Software

数值分析

数值分析

拉扎维《CMOS集成电路设计》答案手写版

拉扎维《CMOS集成电路设计》答案手写版

数值分析.Timothy Sauer.图灵中文扫描版

数值分析.Timothy Sauer.图灵中文扫描版

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge (XAPP1286)

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...

一种低噪声高电源抑制比CMOS低压差线性稳压器

一种低噪声高电源抑制比CMOS低压[..]

509764_1_En_Print.indd

509764_1_En_Print[..]

ISSCC2021-SC3-Clocking, Clock Distribution, and Clock Management in WirelineWireless Subsystems

ISSCC2021-SC3-Clo[..] Clock Distribution, and Clock Management ...

天线理论与设计第2版

天线理论与设计第2版

W.L) 斯塔兹曼(Stutzman (作者) & 蒂尔 (Thiele.G.A) (作者) & 朱守正 (译者)

Calibre xACT Quick Reference

Calibre xACT Quick Reference

Siemens Industry Software

CMOS模拟集成电路设计与仿真实例——基于Cadence ADE

CMOS模拟集成电路设计与仿真实例[..] ADE

ee214b gmid

ee214b gmid

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques [Paper] - Solid-State Circuits, IEEE Journal of

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...

从零开始学IDA逆向1-31章

从零开始学IDA逆向1-31章

一种用于LDO系统的极点频率调整方法

一种用于LDO系统的极点频率调整方法

维普资讯有限公司

模拟IC 艾伦课件

模拟IC 艾伦课件

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

Radio Frequency System Architecture and Design

Radio Frequency System Architecture and Design

Category: 2010 IEEE International Solid-State Circuits Conference - (ISSCC);2010; ; ;10.1109/ISSCC.2010.5433970

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai