Session 21
未知
电子电路的计算机辅助分析与设计方法.汪蕙
《ModelSim电子系统分析及仿真》
二级运放建立时间与相位裕度的分析与优化
补偿电路总结
番茄花园
CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...
IEEE
eetop.cn Matching
Layout Techniques for Integrated Circuit Designers
Sahrling
开关电源中张弛振荡器的研究与设计
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
基于运算放大器和模拟集成电路的电路[..] with Operational Amplifiers and Analog ...
Sergio Franco 著
数值分析（第5版）习题解答 (李庆扬) (z-lib.org)
Microsoft Word - RDK FractN PLL Tutorial v1.0 090420
ramullen
LOCK DETECTION CIRCUIT AND LOCK (56) Oct. 18, 2011 References ...
High-Speed Architecture for a Programmable Frequency Divider ...
hfss3dlayout
Kezhou Li
Hajimiri Analog DRAFT012021
16位高速CMOS流水线模数转换器[..] (1)
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.
PCI Express PHY v1.0 LogiCORE IP Product Guide