A gm/ID Based Methodology for the Design of CMOS Analog Circuits ...
IEEE
数字信号处理 时域离散随机信号处理
阔永红
一种带瞬态响应增强的无电容型LDO
未知
Session 17
零点极点
全差分运算放大器设计
唐长文
全差分运算放大器设计-tangzh[..]
chwtang
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
IEEE Standard for Information Technology—Teleco[..] and information ...
LAN/MAN Standards Committee of the IEEE Computer Society
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
Design of Low Noise Amplifiers
Steve Long
CMOS模拟IP线性集成电路 (1)
ch3_pnjunction
Claudio Talarico
无输出电容的瞬态增强NMOS LDO
ESD Analog Circuits and Design
CMOS-Voltage-Refe[..]
4<8=8AB@0B>@
Wideband RF PLL fractional/integer frequency synthesizer with ...
STMICROELECTRONICS
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
PCI Express PHY v1.0 LogiCORE IP Product Guide