Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
未知
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre
尹飞飞
Analysis and Design of CMOS Clocking Circuits for Low Phase ...
Woorham Bae & Deog-Kyoon Jeong
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
ARM AMBA 5 AHB Protocol Specification AHB5, AHB-Lite
ARM Limited
Session 18
高频电子线路.第五版
基于CMOS工艺的负压低压差线性稳[..]
LDO的三种频率补偿方案实现
模拟CMOS集成电路设计（拉扎维）答案
陈鹏远
Report for current mirror OPAMP
运放chopper基本原理
SENASIC
一种带过温过流过压保护的LDO设计
Striving for small-signal stability - IEEE Circuits and Devices ...
IEEE
Design of Sigma-Delta Converters in MATLAB-
一种适用于微传感器读出电路的低噪声[..] (1)
509764_1_En_Print[..]
0014813
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.