Session 8: Ultra-High-Speed Wireline
未知
On-Chip Compensated Error Amplifier for
基于功耗优化的Pipelined+[..] (1)
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
Spice Modeling and Simulation of a MPPT Algorithm
Design of class AB output stages using the structural methodology
V. Ivanov & I. Filanovsky
Oscillator phase noise: a tutorial
T.H. Lee;A. Hajimiri
Session 19: Optical Systems for Emerging Applications
Spectre Circuit Simulator and Accelerated Parallel Simula tor ...
Inc. Cadence Design Sys tems
Single miller capacitor frequency compensation technique for ...
Cadence高速电路板设计
Dynamic Analysis of Switching-Mode DC DC Converters-Springer ...
Universal Serial Bus 3.0 Specification
一种适用于微传感器读出电路的低噪声[..] (1)
Front Cover Circuit Analysis I.qxd (Page 1)
Karris, Steven T.
Pyros Interactive Viewer User Guide
Inc. Synopsys
微波工程（第四版） (David M.Pozar) (Z-Library)
ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators
IEEE Standard for Ethernet