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A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with over 80-dB SFDR - Solid-State Circuits, IEEE Journal of

A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for ...

Embedded Design Handbook

Embedded Design Handbook

Intel Corporation

Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) (z-lib.org) (1)

Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) ...

Universal Verification Methodology (UVM) Cookbook

Universal Verification Methodology (UVM) Cookbook

Functional Verification Methodology Team - Mentor & A Siemens Business

Topic 8 Circuit Envelope

Topic 8 Circuit Envelope

Rashaunda Henderson

MATLAB-SIMULINK通信系统建模与仿真实例分析-清华大学 2

MATLAB-SIMULINK通信[..] 2

Analog-to-Digital Conversion

Analog-to-Digital Conversion

Solution-for-Design of Analog CMOS Integrated Circuits 2nd

Solution-for-Design of Analog CMOS Integrated Circuits 2nd

Spectre Circuit Simulator and Accelerated Parallel Simula tor RF Analysis in ADE Explorer Workshop

Spectre Circuit Simulator and Accelerated Parallel Simula tor ...

Inc. Cadence Design Sys tems

一种用于LDO系统的极点频率调整方法

一种用于LDO系统的极点频率调整方法

维普资讯有限公司

CMOS带隙基准源研究

CMOS带隙基准源研究

Sampled Systems and the Effects of Clock Phase Noise and Jitter Application Note (AN-756)

Sampled Systems and the Effects of Clock Phase Noise and Jitter ...

Analog Devices, Inc.

学校代码 10530 学号 201110061316

学校代码 10530 学号 201110061316

数值分析（第5版）习题解答 (李庆扬) (z-lib.org)

数值分析（第5版）习题解答 (李庆扬) (z-lib.org)

FPGA数字信号处理设计教程-system generator入门与提高

FPGA数字信号处理设计教程-sy[..] generator入门与提高

基于FPGA的嵌入式图像处理系统设计原魁[译]

基于FPGA的嵌入式图像处理系统设计原魁[译]

微波工程（第3版）

微波工程（第3版）

（美）DAVID M.POZAR著张肇仪周乐柱吴德明等译

Category: MATERIALS

Analysis and Design of CMOS Clocking Circuits for Low Phase Noise

Analysis and Design of CMOS Clocking Circuits for Low Phase ...

Woorham Bae & Deog-Kyoon Jeong