Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
Fundamentals of Digital Logic with Verilog Design, THIRD EDITION
Stephen Brown & Zvonko Vranesic
A simple three-terminal IC bandgap reference
A.P. Brokaw
Simulating Switched-Capacitor Filters with SpectreRF
Ken Kundert
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
The advanced part of A treatise on the dynamics of a system ...
Routh, Edward John, 1831-1907.
电路分析
未知
Session 36: Hardware Security
分类号 密级
USER
Michiel Steyaert CMOS CELLULAR RECEIVER FRONT-ENDS
低功率、高分辨率的A-D转换器@2018
作者
抗浪涌静电器件防护机理与片上集成实验研究
Legend User
tcsii.2005.A new modeling and optimization of gain-boosted cascode ...
A 2-dB noise figure 900-MHz differential CMOS LNA - Solid-State ...
LINUX设备驱动程序
Jonathan Corbet,Alessandro Rubini,Greg Kroah-Hartman著;魏永明,耿岳,钟书毅译
电路设计仿真
jianggx
Harmonic Balance for Nonlinear Vibration Problems
0002624
ee214b gmid
IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...
LAN/MAN Standards Committee of the IEEE Computer Society