Session 3
未知
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
芯片I／O缓冲及ESD电路设计
2019 Book Digital Subsampling Phase Lock Techniques for Frequency ...
射频集成电路
John
USB 2.0
hevryjiang
RF Circuit Design (Information and Communication Technology ...
Richard C. Li
基于功耗优化的Pipelined+[..] (1)
CMOS带隙电压基准的误差及其改进 陈浩琼
艾伦教材答案
一种带过温保护和折返电流限的LDO设计
Session 29V
Spectre FX Circuit Simu lator User Guide
Inc. Cadence Design Sys tems
池保勇 CMOS射频集成电路分析与设计
基于自偏置技术的锁相环设计 刘克赛2019
刘克赛
王华老师射频功放教材
Power Management Techniques for Integrated Circuit Design
Ke-Horng Chen
2.7Gbps收发器中LVDS驱动[..]
IEEE Std 1801™-2018, IEEE Standard for Design and Verification ...
Design Automation Standards Committee of the IEEE Computer Society