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AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

Low-Cost Low-Power 2.4 GHz RF Transceiver datasheet (Rev. C)

Low-Cost Low-Power 2.4 GHz RF Transceiver datasheet (Rev. C)

Texas Instruments, Incorporated [SWRS040,C

PrimeSim� EMIR Reference Manual

PrimeSim� EMIR Reference Manual

一种具有过温与过流保护功能的LDO

一种具有过温与过流保护功能的LDO

Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology

Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...

Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed

通信原理第7版

通信原理第7版

樊昌信，曹丽娜编著

Matching Analysis and the Design of Low Offset Amplifiers

Matching Analysis and the Design of Low Offset Amplifiers

EDA与IC设计 CMOS集成电路后端设计与实战

EDA与IC设计 CMOS集成电路后端设计与实战

高精度、快速瞬态响应LDO电路设计

高精度、快速瞬态响应LDO电路设计

Scaling <formula formulatype="inline"><tex Notation="TeX">$LC$</tex></formula> Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...

Shih-An Yu & Peter R. Kinget

数字信号处理时域离散随机信号处理

数字信号处理时域离散随机信号处理

微波工程（第四版） (David M.Pozar) (Z-Library)

微波工程（第四版） (David M.Pozar) (Z-Library)

信号与系统下第三版

信号与系统下第三版

GmID Methodology

GmID Methodology

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

Radio Frequency System Architecture and Design

Radio Frequency System Architecture and Design

Design of Sigma-Delta Converters in MATLAB

Design of Sigma-Delta Converters in MATLAB

射频集成电路

射频集成电路

IEEE Std 1801™-2018, IEEE Standard for Design and Verification of Low-Power, Energy-Aware Electronic Systems

IEEE Std 1801™-2018, IEEE Standard for Design and Verification ...

Design Automation Standards Committee of the IEEE Computer Society