ISSCC2021-SC4
未知
数字信号处理及其matlab实现
Lee
RC OSCILLATOR WITH ADDITIONAL NVERTER IN SERIES WITH CAPACTOR
Computer Arithmetic - Algorithms and Hardware Designs
Parhami
数字信号处理 时域离散随机信号处理
阔永红
Distributed MOS varactor biasing for VCO gain equalization in ...
J. Mira & T. Divel & S. Ramet & J.-B. Begueret & Y. Deval
一种应用于LDO的CMOS误差放大器设计
Switching Power Supplies A to Z
Maniktala, Sanjaya.
Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
反馈运算放大器电路的噪声分析和设计
UVM实战（卷Ⅰ)
张强编著
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio
ISSCC2021-T12-com[..]
IEEE Standard for Ethernet
ISSCC2021-T2-Fund[..] of Memory Subsystem Design for HPC and ...
Microsoft Word - translator_prefac[..]
Zhiping Yu
Phase Locked Loops for Wireless Communications
Instruction for Camera-Ready Paper
Guo-Ping Ru
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
Xilinx DS534, FIR Compiler v5.0, Data Sheet