工程电路分析
未知
Session 34
High Speed Data Converters
Ahmed M.A. Ali
Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
PLL Perfomance, Simulation, and Design
Dean Banerjee
频率补偿研究心得
番茄花园
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
CMOS 集成电路设计手册 第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION ...
一种超低静态功耗LDO的设计
Calibre® DESIGNrev Layout Viewer User's Manual
Siemens Industry Software
ofdm功能说明文档
Jun Wen Luo
数字集成电路物理设计
陈春章 艾 霞 王国雄 编著
Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...
libgen.lc-2
高PSRR无电容型线性稳压器的研究与设计
LU HUNG
拉扎维 数据转换器设计 原版 (1)
简并点优化的高性能带隙基准电路
高速数字电路设计中信号完整性分析与研究
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
Xilinx, Inc.
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,
Xilinx DS534, FIR Compiler v5.0, Data Sheet