RF Circuit Design
Bowick, Christopher;Blyler, John;Ajluni, Cheryl
Static timing analysis for nanometer designs a practical approach ...
未知
Jespers-The gm ID Methodology, a sizing tool
计算电磁学 by 王秉中,邵维 (z-lib.org)
CNKI
CMOS IC LAYOUT
Wei Zhi
模拟集成电路设计与仿真 何乐年
Edward
Noise in Solid-state Devices and Lasers
RFIC2 Razavi
数字通信同步技术的MATLAB与F[..] Altera Verilog版 [杜勇 编著] 2015年版
Continuous-Time Delta-Sigma Modulators for High-Speed AD Conversion ...
4<8=8AB@0B>@
12bit pipeline ADC design
Precise delay generation using coupled oscillators
J.G. Maneatis & M.A. Horowitz
Topics in Multiple-Loop Regulators and Current-Mode Programming
Advanced Opamp Topologies
Michael H. Perrott
Session 2: Highlighted Chip Releases: 5G and Radar Systems
高速信令-抖动建模-分析预算
Universal Verification Methodology (UVM) Cookbook
Functional Verification Methodology Team - Mentor & A Siemens Business
Oscillator phase noise: a tutorial
T.H. Lee;A. Hajimiri
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,
Xilinx DS534, FIR Compiler v5.0, Data Sheet