一种具有温度补偿 高电源抑制比的带隙基准源 何捷 (1)
未知
Session 13
IP3 and Intermodulation Guide | Maxim Integrated
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
TCASⅡ 202212
Computational Electromagnetics with MATLAB®, Fourth Edition
Matthew N.O. Sadiku
Cancellation of Amplifier Offset and f-Noise An Improved Chopper ...
Katsuhiko Ogata
dynstab2/ThePirateBay
Microsoft Word - Frequency Response.doc
rayork
PLL WITH LOW SPURS
用于LDO稳压器的CMOS基准电压[..]
Calibre® xRC User's Manual
Siemens Industry Software
eetop.cn CMOS VLSI Design A Circuits and Systems Perspective ...
Design of Analog CMOS Integrated Circuits
Razavi
CMOS集成电路中静电防护电路的设[..]
低压低功耗CMOS带隙电压基准及启[..] 许长喜
Session 15: Compute-in-Memory Processors for Deep Neural Networks
设计Bandgap时考虑的几个问题
yzx
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.