基于CMOS工艺的ESD器件及全芯[..]
PLJIE
Digital Design Netlisting and Simulation SKILL Refer ence
Inc. Cadence Design Sys tems
ISF_TUTORIAL
YIZHE HU
Temperature in EMX
kapur
微波工程
David M. Pozar
CMOS带隙电压基准的误差及其改进 陈浩琼
未知
Altera系列FPGA芯片IP核详解
Analog Integrated Circuit Design
Tony Chan Carusone, David A. Johns & Kenneth W. Martin
一种用于LDO系统的极点频率调整方法
维普资讯有限公司
Tempus User Guide
RFIC2 Razavi Solution
Session 35
LDO中过温保护电路的设计
带ESD保护结构的IO单元库的设计
Radio Frequency Integrated Circuits and Systems
Hooman Darabi
Generate ESD Source in ADS
TU,NASH (K-Taiwan,ex1)
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
AMBA AXI Protocol Specification
ARM Limited