A compact power-efficient 3 V CMOS rail-to-rail input/output ...
IEEE
芯片I／O缓冲及ESD电路设计
未知
Nested Miller compensation in low-power CMOS design
Ka Nang Leung;P.K.T. Mok
NONE
TOM
一种新型CMOS误差放大电路的设计 来新泉
A 25Gb/s PAM4 Transmitter in 90nm CMOS SOI
Author
hfss3dlayout
Kezhou Li
Topics in Multiple-Loop Regulators and Current-Mode Programming
数字信号处理导论MATLAB实现 2版 (Robert A.Schlling Sandra L... (z-lib.org)
man.book
merickso
Session 5: Analog Interfaces
Distributed Loss-Compensation Techniques for Energy-Efficient ...
Low-Cost Low-Power 2.4 GHz RF Transceiver datasheet (Rev. C)
Texas Instruments, Incorporated [SWRS040,C
设计Bandgap时考虑的几个问题
yzx
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
introduction.ppt
kdjwang
模拟集成电路分析与设计 洪志良
SAR ADC和SD ADC设计-工业应用
Vivado Design Suite User Guide: Logic Simulation (UG900)