PLL 设计仿真及应用
Roland E. Best
CMOS模拟集成电路设计与仿真实例[..] ADE
未知
Frequency Compensation of Op-amp and its types Circuit Digest
Power systems-on-chip practical aspects of design (Allard, Bruno) ...
4<8=8AB@0B>@
Noise in Solid-state Devices and Lasers
Mechanical Design Handbook Measurement, Analysis and Control ...
CN101140511B-硅谷数模[..] carry binary adder
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
高频高速电子系统中的信号完整性研究
Embedded Peripherals IP User Guide
Intel Corporation
ADC-based Receivers for Wireline Communication
基准电压源和线性稳压器的设计-ta[..]
lmliu
Session 1: Plenary Session — Invited Papers
Analog Circuit Design Volume 2 Immersion in the Black Art of ...
Bob Dobkin,John Hamburger
Analog-Circuit-co[..]
16位高速CMOS流水线模数转换器[..] (1)
高精度sigma-delta ADC设计研究与实现
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
Vivado Design Suite User Guide: Logic Simulation (UG900)
Xilinx, Inc.