Session 15: Compute-in-Memory Processors for Deep Neural Networks
未知
Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
信号与系统 MATLAB综合实验
CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...
Bram De Muer & Michiel Steyaert
Session 32: Frequency Synthesizers
Session 27
Static timing analysis for nanometer designs a practical approach ...
RFIC2 Razavi Solution
AMBA AXI Protocol Specification
ARM Limited
NoiseDesign.dvi
模拟集成电路设计精粹英文版
Virtuoso Multi-Mode Simulation with Spectre Platform
天线理论与设计 第2版
W.L) 斯塔兹曼(Stutzman (作者) & 蒂尔 (Thiele.G.A) (作者) & 朱守正 (译者)
DCDC-EECS-2011-94
X-Parameters
DAVID E. ROOT
eetop.cn (Paper)The Flipped Voltage Follower A Useful Cell for
Session 17
finite elemennt anlysis in ansys
kubik
Sigma-Delta ADCs - Tutorial | Maxim Integrated