PLL WITH LOW SPURS
未知
一个全差分运放电路的设计
Administrator
Preparation of Papers in Two-Column Format for the Proceedings ...
Laura Hyslop
Herbst-MIT2011--A Low-Noise Bandgap Voltage Reference Employing ...
Pieter Harpe, Andrea Baschirotto, Kofi A. A. Makinwa eds. High-Performance ...
Research and Design of Buck-Boost DC-DC Converter
CNKI
CMOS模拟集成电路设计与仿真实例[..] ADE 陈成颖
拉扎维 数据转换器设计 原版
Continuous-Time Delta-Sigma Modulators for High-Speed AD Conversion ...
4<8=8AB@0B>@
A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin
【汉化】Static Timing Analysis for Nanometer DesignsA Practical ...
Practical RF Amplifier Design and Performance Optimization with ...
一种加入动态补偿电路的快速响应LDO设计
PHASE-INTERPOLATOR BASED PLL FREQUENCY SYNTHESIZER
Calibre® Local Printability Enhancement User's and Reference ...
Siemens Industry Software
Elementary Differential Equations and Boundary Value Problems
William E. Boyce & Richard C. Diprima & Douglas B. Meade
Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power ...
Jaehun Lee & Ji-Seon Paek & Songcheol Hong
低功耗CMOS逐次逼近型模数转换器 [朱樟明，杨银堂著][科学出版社][..]
IEEE Standard for Ethernet