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Discover (Random Books)

使用电压基准进行设计的提示和技巧

使用电压基准进行设计的提示和技巧

Texas Instruments, Incorporated [ZHCC347,*]

ISSCC2021 Session 29

ISSCC2021 Session 29

未知

Nested Miller compensation in low-power CMOS design

Nested Miller compensation in low-power CMOS design

Ka Nang Leung;P.K.T. Mok

ch3_pnjunction

ch3_pnjunction

Claudio Talarico

线性代数教材(同济五版+学习辅导与习题全解)

线性代数教材(同济五版+学习辅导与[..]

Acampo GmbH

分段温度曲率补偿双极工艺带隙基准设计

分段温度曲率补偿双极工艺带隙基准设计

未知

HFSS电磁仿真设计从入门到精通

HFSS电磁仿真设计从入门到精通

未知

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 4: Enhancements for Very High Throughput for Operation in Bands below 6 GHz

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...

LAN/MAN Standards Committee of the IEEE Computer Society

模拟集成电路设计精粹英文版

模拟集成电路设计精粹英文版

未知

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge (XAPP1286)

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...

Xilinx, Inc.

Enhanced phase noise modeling of fractional-N frequency synthesizers

Enhanced phase noise modeling of fractional-N frequency synthesizers

H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf

MIPI Alliance Specification for I3C Basic, Version 1.0

MIPI Alliance Specification for I3C Basic, Version 1.0

MIPI Alliance & Inc.

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input Stages

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...

未知

ADS2011射频电路设计与仿真实例

ADS2011射频电路设计与仿真实例

徐兴福著

Solution-for-Design of Analog CMOS Integrated Circuits 2nd

Solution-for-Design of Analog CMOS Integrated Circuits 2nd

未知

FPGA数字信号处理设计教程-system generator入门与提高

FPGA数字信号处理设计教程-sy[..] generator入门与提高

未知

CMOS运算放大器和比较器的设计及应用 [GabrielAlfonsoRincon-Mora 著] 2014年版

CMOS运算放大器和比较器的设计及应用 [GabrielAlfonsoRi[..] 著] 2014年版

未知

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for ...

Pandit, Soumya

Category: load-pull

Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design

Frequency Reconfigurable mm-Wave Power Amplifier With Active ...

Chandrakanth R. Chappidi & Kaushik Sengupta

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