天线（第三版）约翰克劳斯中文高清全本
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Microsoft Word - AXI protocol 翻译.doc
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A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
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Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
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Inc. Synopsys
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio