25Gbps系统封装和高速互连的信[..]
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A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
集成电路版图设计 [陆学斌 主编] 2012年版
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
Xilinx, Inc.
Computational Methods in Electromagnetic Compatibility Antenna ...
PrimeSim� HSPICE® User Guide: Advanced Analog Simulation and ...
Inc. Synopsys
A Micropower Chopper-Stabilized Operational Amplifier Using ...
Rod Burt;Joy Zhang
基于Latch的CMOS动态比较器的研究
一种极低静态电流LDO线性稳压器的设计
Session 10: Continuous-Time ADCs and DACs
Topics in Multiple-Loop Regulators and Current-Mode Programming
适用于高速闪存的超快无片外电容LDO
Aperture Uncertainty and ADC System Performance Application ...
Analog Devices, Inc.
基于XILINX FPGA的OFDM通信系统基带设计
工作于亚阈值区的偏置基准电路-峰值电流镜
Power supply rejection ratio in operational transconductance ...
IEEE
Session 16
Analog Circuit Design Volume 3 Design Note Collection
Bob Dobkin, Jim Williams
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li