Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
PLL 设计仿真及应用
Roland E. Best
一种具有采样保持功能的开关电容积分器 宋文清
CNKI
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
未知
Signal and Power Integrity - Simplified, Third edition
Eric Bogatin
Fundamental Principles Behind the Sigma-Delta ADC Topology Part ...
Michael Clifford & Analog Devices Inc
TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference
Session 36: Hardware Security
ESD Design and Synthesis
工作在亚阈值区CMOS OTA的研究
数值分析(第5版)习题解答 (李庆扬) (z-lib.org)
Advanced data converters G Manganaro
模拟集成电路与系统 Analog Integrated Circuits and Systems
池保勇 编著
高等数学 第7版 上
同济大学数学系编
Wiener-Khinchin theorem
ISSCC2021-T9-Desi[..] Amplifiers for Stability
电路原理 (第7版)
一种快速瞬态响应LDO的设计与实现
TOM
NONE
USB 3.0中五分频电路设计