理工书库 lilin | Category: IEEE Microwave Magazine;2019;20;5;10.1109/MMM.2019.2898022

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CMOS模拟IP线性集成电路 (1)

CMOS模拟IP线性集成电路 (1)

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

Matching Analysis and the Design of Low Offset Amplifiers

Matching Analysis and the Design of Low Offset Amplifiers

PLL WITH LOW SPURS

PLL WITH LOW SPURS

高精度带隙基准电压源研究与设计

高精度带隙基准电压源研究与设计

高效率boost DCDC电源管理芯片设计技术研究

高效率boost DCDC电源管理芯片设计技术研究

Modeling Jitter in PLL-based Frequency Synthesizers

Modeling Jitter in PLL-based Frequency Synthesizers

man.book

man.book

集成电路静态时序分析与建模

集成电路静态时序分析与建模

普通高等教育“十一五”国家级规划教材现代控制理论（第三版）

普通高等教育“十一五”国家级规划教材现代控制理论（第三版）

刘豹唐万生主编

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

Fire and Ice QXC to Quantus Migration Guide

Fire and Ice QXC to Quantus Migration Guide

Inc. Cadence Design Sys tems

数字滤波器的MATLAB与FPGA实现（第2版）

数字滤波器的MATLAB与FPGA[..]

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher Kayal

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...

ISSCC2021-SC4

ISSCC2021-SC4

LDO设计论文

LDO设计论文

RF and Microwave Power Amplifier Design

RF and Microwave Power Amplifier Design

Andrei Grebennikov

LDO中过温保护电路的设计

LDO中过温保护电路的设计

Category: IEEE Microwave Magazine;2019;20;5;10.1109/MMM.2019.2898022

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen