HIGH QUALITY PARALLEL RESONANCE OSCILLATOR
未知
模拟IC设计
格雷
Session 17
运算放大器 理论与设计 9影印版 （荷）惠意欣著
工作在亚阈值区CMOS OTA的研究
14984226455248291[..]
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
低压差电压调节器技术发展动态
WLAN射频接收机集成电路设计与研究
一种极低静态电流LDO线性稳压器的设计
NumericalOptimiza[..]
数值分析.Timothy Sauer.图灵中文扫描版
Session 8: Ultra-High-Speed Wireline
Understanding Jitter and Phase Noise : A Circuits and Systems ...
Nicola Da Dalt; Ali Sheikholeslami & Ali Sheikholeslami
CMOS射频集成电路分析与设计 (池保勇, 余志平, 石秉学) (z-lib.org)
untitled
Computing ACPR from 1Tone HB ADS 2011
aehoward
Session 36: Hardware Security
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.