CMOS模拟IP线性集成电路 (1)
未知
基于 DLL倍频技术的 1GHz本地振荡器设计 英文 李金城
Full page photo print
aboozar
ZigBee低中频接收机中复数滤波[..]
Gray Hurst Analysis and Design of Analog Integra
一种高性能CMOS带隙电压基准源设计 朱樟明
Virtuoso Parameterized Cell Reference
Inc. Cadence Design Sys tems
Questa Verification IP Data Book
Mentor Graphics Corporation
Cancellation of Amplifier Offset and f-Noise An Improved Chopper ...
FinFET Modeling for IC Simulation and Design
4<8=8AB@0B>@
Microsoft Word - RDK FractN PLL Tutorial v1.0 090420
ramullen
微波工程 （第3版）
（美）DAVID M.POZAR著 张肇仪 周乐柱 吴德明等译
Microsoft Word - PREAMBLE.DOC
Administrator
js.2010.PFD biased with shunt regulator
全差分运算放大器设计-tangzh[..]
chwtang
Analog Integrated Circuit Design
Tony Chan Carusone, David A. Johns & Kenneth W. Martin
Cadence PVS Developers Guide
Session 3
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.