基于运算放大器和模拟集成电路的电路[..] with Operational Amplifiers and Analog ...
Sergio Franco 著
Session 8: Ultra-High-Speed Wireline
未知
基准电压源和线性稳压器的设计
lmliu
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
一种用于低功耗LDO的CMOS电压[..]
实用开关电源设计
CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated ...
美 & Thomas H. Lee 著 & 余志平 周润德 等译
无输出电容的瞬态增强NMOS LDO
数值分析基础(第三版) (关治、陆金甫) (z-lib.org)
PLL WITH LOW SPURS
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Xilinx, Inc.
Spectre FX Circuit Simu lator User Guide
Inc. Cadence Design Sys tems
集成电路版图设计 [陆学斌 主编] 2012年版
ISSCC2021-SC3-Clo[..] Clock Distribution, and Clock Management ...
一种具有温度补偿的带隙基准源及其输[..] 何捷
多采样率系统:采样率转换和数字滤波器组
Next-Generation ADCs, High-Performance Power Management, and ...
EE214B Advanced Analog Integrated Circuit Design Winter2016 ...
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi