理工书库 lilin | Category: This IP core is used for building a PCI Express® Media Access Controller (MAC) layer. It supports 1/2/4/8/16-lane

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High Speed Data Converters

High Speed Data Converters

Differential Equations Theory, Technique, and Practice by George Simmons, Steven Krantz (z-lib.org)

Differential Equations Theory, Technique, and Practice by George ...

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (The Springer International Series in Engineering and Computer Science)

CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...

Bram De Muer & Michiel Steyaert

ISSCC2017-24 Visuals(2)

ISSCC2017-24 Visuals(2)

高精度、快速瞬态响应LDO电路设计

高精度、快速瞬态响应LDO电路设计

带隙基准电路的研究

带隙基准电路的研究

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

Harmonic Balance Finite Element Method: Applications in Nonlinear Electromagnetics and Power Systems

Harmonic Balance Finite Element Method: Applications in Nonlinear ...

Junwei Lu & Xiaojun Zhao & Sotoshi Yamada

Algorithms for VLSI Physical Design Automation, 3E

Algorithms for VLSI Physical Design Automation, 3E

Naveed Sherwani

深入Linux内核架构

深入Linux内核架构

电路设计仿真

电路设计仿真

Session 17: DC-DC Converters

Session 17: DC-DC Converters

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated ...

美 & Thomas H. Lee 著 & 余志平周润德等译

Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice Hall, Inc)

Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...

Herbst-MIT2011--A Low-Noise Bandgap Voltage Reference Employing Dynamic Element Matching

Herbst-MIT2011--A Low-Noise Bandgap Voltage Reference Employing ...

一种LDO使能控制端失效的分析方法

一种LDO使能控制端失效的分析方法

Session 4: Processors

Session 4: Processors

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE Journal of

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...

Category: This IP core is used for building a PCI Express® Media Access Controller (MAC) layer. It supports 1/2/4/8/16-lane

PCI Express PHY v1.0 LogiCORE IP Product Guide

PCI Express PHY v1.0 LogiCORE IP Product Guide