一种用于LDO的低功耗带隙基准电压源
未知
Operation and Modeling of the MOS Transistor 3rd
Digital Control
Jespers-The gm ID Methodology, a sizing tool
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
Xilinx, Inc.
HSPICE/SPICE Interface Reference
Inc. Cadence Design Sys tems
Session 12
一种应用于LDO的可编程电流限电路设计
Altera系列FPGA芯片IP核详解
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
通信系统第五版西蒙赫金
MIMO-OFDM无线通信技术及M[..] WIRELESS COMMUNICATIONS WITH MATLAB
（韩）YONG SOO CHO，JAEKWON KIM，WON YONG YANG，CHUNG G.KANG著；孙锴，黄威译
TrnoiseAN.fm
mtian
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...
Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin
Creating Qsys Components
Altera Corporation
CN103036558B-SMIC[..]
ISSCC2021-SC4
Session 20
PCI Express PHY v1.0 LogiCORE IP Product Guide