ISM-PLL
未知
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
Session 32: Frequency Synthesizers
LOCK DETECTION CIRCUIT AND LOCK (56) Oct. 18, 2011 References ...
半导体物理学 （第七版）
两种新型CMOS带隙基准电路 程军
CNKI
基于CMOS工艺的负压低压差线性稳[..]
Design of Low Noise Amplifiers
Steve Long
实验 带运放的带隙基准设计
USER
一种快速瞬态响应无片外电容LDO
Understanding Jitter and Phase Noise : A Circuits and Systems ...
Nicola Da Dalt; Ali Sheikholeslami & Ali Sheikholeslami
拉扎维《CMOS集成电路设计》答案手写版
Design techniques for cascoded CMOS op amps with improved PSRR ...
D.B. Ribner & M.A. Copeland
StarRC User Guide and Command Reference
Synopsys, Inc.
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
RC OSCILLATOR WITH ADDITIONAL NVERTER IN SERIES WITH CAPACTOR
基于ac620的fpga系统设计与[..]
Administrator
数字信号处理的FPGA实现(第3版[..]
射频集成电路与系统
李智群 王志功 编著