PLL频率合成器的杂散性能分析
未知
适宜于系统集成的高速高精度模数转换[..]
eetop.cn CMOS VLSI Design A Circuits and Systems Perspective ...
MT-001: Taking the Mystery out of the Infamous Formula,'SNR ...
Walt Kester
Analog-Circuit-co[..]
基于ac620的fpga系统设计与[..]
Administrator
CMOS集成电路中静电防护电路的设[..]
Numerical Simulation of Optical Wave Propagation With Examples ...
Jason D. Schmidt
CN105530002B-中电华大[..]
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
LDO的三种频率补偿方案实现
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
CN101969305B-威盛电子[..] conversion circuit
微波工程
David M. Pozar
802.11 无线权威指南
LAN/MAN Standards Committee of the IEEE Computer Society
js.2010.PFD biased with shunt regulator
a-new-semiconduct[..]
Session 8
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.