Distributed MOS varactor biasing for VCO gain equalization in ...
J. Mira & T. Divel & S. Ramet & J.-B. Begueret & Y. Deval
CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...
IEEE
基于CMOS工艺的ESD器件及全芯[..]
PLJIE
Spectre Circuit Simulator RF Analysis Theory
Inc. Cadence Design Sys tems
VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
一种具有温度补偿 高电源抑制比的带隙基准源 何捷
未知
DUTY CYCLE CORRECTION CIRCUITRY
高效率 PWM 控制电流型 DC-DC
Lenovo User
微波工程（第四版） (David M.Pozar) (Z-Library)
Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...
libgen.lc-2
CMOS Circuit Design, Layout, and Simulation, 3rd Edition (IEEE ...
R. Jacob Baker
Microsoft Word - Frequency Response.doc
rayork
Analysis and design of monolithic, high PSR, linear regulators ...
Computational Electromagnetics with MATLAB®, Fourth Edition
Matthew N.O. Sadiku
Session 12
DDS信号发生器的实现
Administrator
Session 16: Computation in Memory
Introduction to RF Simulation and its Application
Ken Kundert
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx DS534, FIR Compiler v5.0, Data Sheet
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)