Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES
未知
无输出电容的瞬态增强NMOS LDO
A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless ...
IEEE
高速数字电路设计中信号完整性分析与研究
A detailed analysis of power-supply noise attenuation in bandgap ...
LDO工作原理详解
Session 4
CMOS模拟集成电路设计与仿真实例[..] ADE 陈成颖
Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design
Numerical Analysis
Richard L. Burden
Middlebrook Part 1
mwidmer
Next-Generation ADCs, High-Performance Power Management, and ...
高精度、快速瞬态响应LDO电路设计
Stability for Op Amps
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
高速串行接口时钟数据恢复电路设计研究
Electronic Circuit and System Simulation Methods
Lawrence T. Pillage, Ronald A. Rohrer, Chandramouli Visweswariah
芯片漫游指南
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
Xilinx DS534, FIR Compiler v5.0, Data Sheet