ISSCC2020-01 Visuals
Steve Bonney
基于0.13μm SOI CMOS工艺的高性能LDO设计
未知
半导体器件物理(第3版)-中文版-[..]
数字VLSI芯片设计 使用Cadence和Synopsys CAD工具
艾瑞克·布鲁范德著
CMOS带隙基准源研究现状 幸新鹏
Elementary Differential Equations and Boundary Value Problems
William E. Boyce & Richard C. Diprima & Douglas B. Meade
CN102393785B-砂力杰-[..]
SARADC设计
李福乐
MSSC.2016.B. Razavi-TSPC Logic
电源芯片中CMOS带隙基准源与微调[..] (1)
2014 PhD-Thesis BAG A Designer-Oriented Framework for the Development ...
Session 25
Wiener-Khinchin theorem
Generate ESD Source in ADS
TU,NASH (K-Taiwan,ex1)
<4D6963726F736F66[..]
linjie
CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre
尹飞飞
Session 33: High-Voltage, GaN and Wireless Power
A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
K. Bult;G.J.G.M. Geelen
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
Xilinx DS534, FIR Compiler v5.0, Data Sheet