Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...
LAN/MAN Standards Committee of the IEEE Computer Society
TrnoiseAN.fm
mtian
ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators
未知
2.7Gbps收发器中LVDS驱动[..]
An improved bandgap reference with high power supply rejection ...
适合通信应用的低功耗55纳米12 省略 0 MSps双通道流水线型ADC 陈宏铭
CNKI
Session 20: High-Performance VCOs
基于延迟锁相环的时钟发生器设计
Advanced Computational Electromagnetic Methods and Applications
Yu, Li, Elsherbeni, Rahmat-Samii, Editors
VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
CN105824349A-上海巨微[..] bandgap
NONE
TOM
Session 17: DC-DC Converters
A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless ...
IEEE
TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference
Avalon Verification IP Suite User Guide
Altera Corporation