Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...
IEEE
Guillermo Gonzalez
Microwave Transistor Amplifiers Analysis & Design
Session 12: Innovations in Low-Power and Secure IoT
未知
模拟CMOS集成电路设计(拉扎维)答案
陈鹏远
Hajimiri Analog DRAFT012021
Analysis and Design of CMOS Clocking Circuits for Low Phase ...
Woorham Bae & Deog-Kyoon Jeong
Using the Python API to Develop Process Portable PyCells
Inc. Synopsys
Microsoft PowerPoint - Bandgap and LDO.pptx
Administrator
FinFET Modeling for IC Simulation and Design
4<8=8AB@0B>@
高数第七版 下册
Finite element analysis with error estimators an introduction ...
数字集成电路电路、系统与设计(第2[..] 拉贝艾(Jan M.Rabaey)、 Anantha Chandrakasan
PLL频率合成器的杂散性能分析
纳米级CMOS逐次逼近A D转换器设计研究与实现
实时数字信号处理 实践方法与应用 原书第2版
(美)郭森楙,(美)李鲍勃,(美)田文顺著
基于CMOS工艺的负压低压差线性稳[..]
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao
Precise delay generation using coupled oscillators
J.G. Maneatis & M.A. Horowitz
Triple-Speed Ethernet Intel® FPGA IP User Guide
Intel Corporation