高效率峰值电流模BOOST型DC-[..]
jlxu
Session 6: High-Performance Receivers and Transmitters for Sub-6GHz ...
未知
一种应用于DC DC转换器的自举电路设计
A TIA in CMOS 0.18um
一种应用于LDO的CMOS误差放大器设计
高精度带隙基准电压源的研究与设计
iData
数值计算方法 (2)
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
低压低功耗CMOS带隙电压基准及启[..] 许长喜
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
半导体工艺和器件仿真工具Silvaco TCAD
唐龙谷
Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
Session 30
模拟CMOS集成电路设计第一版
2-Stage OTA Design
CN104977963A-兆易创新[..]
Physical design essentials an ASIC design implementation perspective ...
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)