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CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...

D.J. Foley;M.P. Flynn

普林斯顿微积分读本（修订版）

普林斯顿微积分读本（修订版）

LDO线性稳压器中高性能误差放大器的设计

LDO线性稳压器中高性能误差放大器的设计

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi

开关电容电路从入门到精通

开关电容电路从入门到精通

$A modeling approach for /spl Sigma/-/spl Delta/ fractional-N frequency synthesizers allowing straightforward noise analysis$

A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...

M.H. Perrott & M.D. Trott & C.G. Sodini

Microsoft Word - Frequency Response.doc

Microsoft Word - Frequency Response.doc

SAR ADC和SD ADC设计-工业应用

SAR ADC和SD ADC设计-工业应用

APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital Converters

APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital ...

无电容型LDO的研究现状与进展

无电容型LDO的研究现状与进展

集成电路版图设计

集成电路版图设计

余华，师建英编著

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for ...

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

RFIC2 Razavi

RFIC2 Razavi

开关电源设计第3版

开关电源设计第3版

（美）普利斯曼，比利斯，莫瑞著

Computer Arithmetic - Algorithms and Hardware Designs

Computer Arithmetic - Algorithms and Hardware Designs

Assura Physical Verifica tion User Guide

Assura Physical Verifica tion User Guide

Inc. Cadence Design Sys tems

Category: Artix7

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)

7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)