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模拟电路与数字电路

模拟电路与数字电路

模拟集成电路设计与仿真何乐年

模拟集成电路设计与仿真何乐年

ISSCC2021-T6-Basics of DAC-based Wireline Transmitters

ISSCC2021-T6-Basics of DAC-based Wireline Transmitters

Session 15: Compute-in-Memory Processors for Deep Neural Networks

Session 15: Compute-in-Memory Processors for Deep Neural Networks

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA 4 AXI User Guide, Version 2020.03a

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA ...

一种基于OTA的低功耗高速静态比较器设计与应用

一种基于OTA的低功耗高速静态比较[..]

Power Management Techniques for Integrated Circuit Design

Power Management Techniques for Integrated Circuit Design

Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level

Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...

UNIX环境高级编程

UNIX环境高级编程

W.RICHARD STEVENS

硅基压控振荡器的研究与设计电子科技大学彭羽

硅基压控振荡器的研究与设计电子科技大学彭羽

低压低功耗Sigma Delta调制器综述吕立山

低压低功耗Sigma Delta调制器综述吕立山

LDO LINEAR REGULATOR WITH IMPROVED TRANSIENT RESPONSE

LDO LINEAR REGULATOR WITH IMPROVED TRANSIENT RESPONSE

High Performance SAR-based ADC Design in Deep Sub-micron CMOS

High Performance SAR-based ADC Design in Deep Sub-micron CMOS

带使能端及保护电路的LDO设计

带使能端及保护电路的LDO设计

UVM实战（卷Ⅰ)

UVM实战（卷Ⅰ)

A TIA in CMOS 0.18um

A TIA in CMOS 0.18um

esd-circuits-and-devices

esd-circuits-and-[..]

Hajimiri Analog DRAFT012021

Hajimiri Analog DRAFT012021

Category: This core connects one or more AXI memory-mapped master devices to one or more memory-mapped slave devices.

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)