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Discover (Random Books)

DesignWare Foundation Cores Installation and Setup Guide, Version Version 1.61a

DesignWare Foundation Cores Installation and Setup Guide, Version ...

Synopsys, Inc.

Handbook of Algorithms for Physical Design Automation

Handbook of Algorithms for Physical Design Automation

Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar

模拟电路设计——鲁棒性设计、Sigma-Delta转换器、射频识别技术 (模拟电路设计——鲁棒性设计、Sigma-Delta转换器、射频识别技术) (z-lib.org)

模拟电路设计——鲁棒性设计、Sig[..] (模拟电路设计——鲁棒性设计、Si[..] (z-lib.org)

作者

Tempus User Guide

Tempus User Guide

Inc. Cadence Design Sys tems

Virtuoso Multi-Mode Simulation with Spectre Platform

Virtuoso Multi-Mode Simulation with Spectre Platform

未知

An improved bandgap reference with high power supply rejection - Circuits and Systems, 2002 IEEE International Symposium on

An improved bandgap reference with high power supply rejection ...

未知

模拟电路与数字电路

模拟电路与数字电路

林捷

现代控制系统 第12版

现代控制系统 第12版

(美)RECHARD C.DORF,ROBERT H.BISHOP著;谢红卫,孙志强,宫二玲,经纪阳译

ISSCC 2019 Digest of Technical Papers

ISSCC 2019 Digest of Technical Papers

未知

一种10 ppm oC低压CMOS带隙电压基准源设计 朱樟明

一种10 ppm oC低压CMOS带隙电压基准源设计 朱樟明

CNKI

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 4: Enhancements for Very High Throughput for Operation in Bands below 6 GHz

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...

LAN/MAN Standards Committee of the IEEE Computer Society

Session 24: Advanced Embedded Memories

Session 24: Advanced Embedded Memories

未知

Microsoft PowerPoint - PLLnoise_jitter0209.ppt [相容模式]

Microsoft PowerPoint - PLLnoise_jitter02[..] [相容模式]

cwhsu

一种带过温保护和折返电流限的LDO设计

一种带过温保护和折返电流限的LDO设计

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LINEAR SYSTEMS AND SIGNALS

LINEAR SYSTEMS AND SIGNALS

B. P. Lathi & R. A. Green

A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application

A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...

未知

compact trimming design of a high precision reference

compact trimming design of a high precision reference

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Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded Systems

Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded ...

Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.

Category: product.id.P10101

Standard Verification Rule Format (SVRF) Manual 2023

Standard Verification Rule Format (SVRF) Manual 2023

Siemens Industry Software

Standard Verification Rule Format (SVRF) Manual 2020

Standard Verification Rule Format (SVRF) Manual 2020

Mentor Graphics Corporation

Calibre® DefectReview User's Manual

Calibre® DefectReview User's Manual

Siemens Industry Software

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