A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
sido buck converter
Duyu Liu & Xinzhi Liu & Hao Chen & Shouming Zhong
信号与系统上 第三版
未知
js.2010.PFD biased with shunt regulator
CMOS模拟集成电路设计与仿真实例 基于Hspice
ADC-based Receivers for Wireline Communication
模拟CMOS集成电路设计 拉扎维第1版中文
BSIM4 AND MOSFET MODELING FOR IC SIMULATION
Hu, Chenming, Liu, Weidong
线性代数及其应用
高频电子线路.第五版
Microsoft Word - RDK FractN PLL Tutorial v1.0 090420
ramullen
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
现代控制系统 第12版
(美)RECHARD C.DORF,ROBERT H.BISHOP著;谢红卫,孙志强,宫二玲,经纪阳译
Digital Design Netlisting and Simulation SKILL Refer ence
Inc. Cadence Design Sys tems
Internal and external op-amp compensation: a control-centric ...
ADS中噪声源使用验证
XU,YUE (K-China,ex1)
Microstrip Filters for RFMicrowave Applications, Second Edition ...
4<8=8AB@0B>@
2005 Book ClockGeneratorsFo[..]
Introduction to RF Simulation and its Application
Ken Kundert