A Low Power Two Stages CMOS OpAmp
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基于零极点追踪的高稳定性片内LDO[..]
系统芯片中的全数字锁相环设计
Session 35
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
计算电磁学要论 by 盛新庆 (z-lib.org)
CNKI
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
Nios II Processor Reference Guide
Intel Corporation
CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...
Bram De Muer & Michiel Steyaert
一种带瞬态响应增强的无电容型LDO
2-Stage OTA Design
Electronic Design Automation for IC Implementation, Circuit ...
Luciano Lavagno & Igor L. Markov & Grant Martin & Louis K. Scheffer
高速流水线模数转换器关键技术研究与[..]
Microsoft PowerPoint - Loop Stability Analysis_V2
vishalsaxena
Session 5: Analog Interfaces
高性能流水线模数转换器及其数字校准[..] 贾华宇
A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...
CN105530002B-中电华大[..]
Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert